Embedded Machine Learning
Hardware for Deep Learning. Part 4: ASIC | by Grigory Sapunov | Intento
8-Bit Precision for Training Deep Learning Systems | IBM Research Blog
An on-chip photonic deep neural network for image classification | Nature
How to Develop High-Performance Deep Neural Network Object Detection/Recognition Applications for FPGA-based Edge Devices - Embedded Computing Design
Space-efficient optical computing with an integrated chip diffractive neural network | Nature Communications
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
FPGA Based Deep Learning Accelerators Take on ASICs
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
My take on the Gartner Hype Cycle | by Jens Møllerhøj | Medium
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
Deep Neural Network ASICs The Ultimate Step-By-Step Guide eBook : Blokdyk, Gerardus: Amazon.in: Kindle Store
FPGA Based Deep Learning Accelerators Take on ASICs
Are ASIC Chips The Future of AI?
Arch-Net: A Family Of Neural Networks Built With Operators To Bridge The Gap Between Computer Architecture of ASIC Chips And Neural Network Model Architectures - MarkTechPost
The Great Debate of AI Architecture | Engineering.com
Analog architectures for neural network acceleration based on non-volatile memory: Applied Physics Reviews: Vol 7, No 3
Hardware for Deep Learning. Part 4: ASIC | by Grigory Sapunov | Intento
Google AI Blog: Chip Design with Deep Reinforcement Learning
